The Problem: Your design must meet the 100 mUI peak-peak Jitter Generation requirement of GR 2531.
Jitter Generation refers to the intrinsic jitter generated within a Network Element (NE). It is measured at the output of the NE, with no jitter or wander applied at the input.
The 100 mUI peak-peak jitter requirement applies to Category II interfacesError: Reference source not found, which include all OC-N optical and STS-N electrical interfaces to SONET NEs.
Jitter is a noise process, so it is statistical in nature. Maximum peak-peak jitter is accumulated and measured over a 60 second interval2. Low- and high-pass filters are also used, to limit the measurement to the jitter frequency range of interest3.
Cat II Jit Gen
A possible solution?
What about using a tester with jitter measurement accuracy per O.172?
Most SONET jitter testers available today specify the accuracy of their jitter measurement according to ITU-T recommendation O.172.
O.172 specifies jitter measurement accuracy in a number of ways, all in terms of maximum peak-peak jitter using a concatenated SDH (SONET) signal with a 223 – 1 PRBS payload4. The total measurement error allowable comprises fixed and variable components:
±R% of reading ±W
R is the variable component, expressed as a % of the reading. R varies according to the frequency of jitter present in the signal. At STM-16 (OC-48), R ranges from ±7% for low jitter frequencies to ±20% for high jitter frequencies.
W is the fixed error, expressed in UI. This is the intrinsic jitter of the tester’s receiver.
O.172 jitter measurement accuracy cannot guarantee compliance with GR-253!
Cat II Jit Gen
The best solution!
Select from two OmniBER 718 models with superior jitter intrinsic performance!
For some time now, OmniBER has delivered the industry’s best jitter intrinsic performance in the shape of option 200. Typically, this allows designers to work to a 30 mUI safe design margin for peak-peak jitter.
Now, OmniBER also offers a new version – option 210 – that guarantees receiver jitter intrinsics, 30% lower than its current best-in-class levels5. You can now work, with even more confidence, to a 45 mUI safe design margin for peak-peak jitter.
With this significant increase in safe design margin, you can save R&D time, and so benefit from reduced costs and faster time-to-market!